Hi Mark,

thanks a lot for the reply. Actually i have found a pretty solution in another forum for probing but also forcing signal wires when using strings holding the hierarchical path of the wire. If you are also interested you can look at the link below. Unfortunately i do not use a Modelsim simulator so it is rather complicated for me at the moment to follow your procedure.

http://verificationguild.com/modules...ewtopic&t=3422